1. Field of the Invention
The present invention relates to a voltage controlled oscillator using a variable capacitor.
2. Description of Related Art
As conventional voltage controlled oscillators, there is one type using a varactor diode and another type using a resistance value switched by switching of an MOS transistor.
According to conventional techniques described in Japanese Unexamined Patent Laid-open Publication No. H09-102714 (1997) (referred to as “Patent document 1”) and U.S. Pat. No. 5,764,112 (referred to as “Patent document 2”), an ON resistance of a MOS transistor connected to a fixed capacitor in series is switched by switching the ON resistance of the MOS transistor, and thereby a load capacitor seen from an oscillator is changed, so that the frequency is varied.
In formation with a bias voltage set to a gate and a drain connected to a crystal oscillator, when a drain voltage is below a threshold voltage than a gate voltage which represents an ON state of the MOS transistor, a capacitance of a source side appears visible. The voltage controlled oscillator may be constituted as TCXO by applying a temperature compensating voltage or the like to the gate.
FIG. 14 shows a first configuration example of a conventional voltage controlled oscillator, FIG. 15 shows an operation of a conventional circuit, and FIG. 16 shows a second configuration example of a conventional voltage controlled oscillator.
In the first configuration example shown in FIG. 14, an amplifier 1 and a feedback circuit 2 are connected to connection terminals XT, XTB of a crystal oscillator 3 in parallel. Drains of a pair of first and second MOS transistors M1, M2 are connected to the connection terminals XT, XTB of the crystal oscillator 3, and capacitors C1, C2 of fixed capacitance are connected between source terminals thereof and a GND terminal, respectively. The gate terminals of the MOS transistors M1, M2 are connected to each other, and are used as application terminals of a control voltage.
In the switching operation of the MOS transistor M1 shown in FIG. 15, a voltage waveform of a drain terminal of the MOS transistor M1 has an AC amplitude by using the crystal oscillator 3. Then, when the gate voltage of the MOS transistor M1 is set to, for example, 3V as a control signal, and the amplitude of the drain voltage falls by a threshold voltage VT of the MOS transistor from the gate voltage (in this case VT=1V in FIG. 15), a time domain of 2V or less becomes the ON time of the MOS transistor M1. The ON resistance of the MOS transistor M1 becomes extremely low at this ON time, and the capacitance between the source and a GND works greatly as the load capacitor of the crystal oscillator 3, and the control operation acts to lower the frequency.
Herein, a capacitance value is virtually changed according to a ratio of the ON-OFF switching times of the MOS transistor M1, and the frequency can be controlled. Since the drain voltage of the MOS transistor M2 has also a large amplitude, the MOS transistor M2 performs the same operation.
In FIG. 15, when the control voltage shown in FIG. 14 is divided into two kinds to control the frequency of the oscillator, the sizes of the MOS transistors M1, M2 are divided into ½ sizes and the gates thereof are connected to each other. Thereby, an input terminal having the same control sensitivity can be made. In this arrangement, the division of two or more may be performed.
As a result, the control voltages of a temperature compensating signal and an external frequency control signal (VCO) can be separately inputted to perform the control.
Meanwhile, in the second conventional example shown in FIG. 16, a different point from the configuration shown in FIG. 14 resides in that, drains of four MOS transistors M1, M3 and M2, M4 are respectively connected to two connection terminals (XT, XTB) of the crystal oscillator 3, and the sources of the MOS transistors M1 and M3 are made common and connected to the grounding terminal via the capacitor C1 while the sources of the MOS transistors M2 and M4 are made common and connected to the grounding terminal via the capacitor C2. Since the other components of the second conventional example are the same as those of the first conventional example shown in FIG. 14, the explanation of the operation of the second example is omitted here.
In the conventional example shown in FIG. 14, however, it is necessary to lay out the fixed capacitances in the source sides of the MOS transistors respectively, and it is disadvantageous in view of a chip area or the like. Also, the VT variations of the MOS transistor easily affected in the conventional example, and it is very difficult to match the characteristics to be expected.